1. Field of the Invention
The present invention relates generally to semiconductor devices, and more specifically to an analog semiconductor devices having upper and lower polysilicon electrodes and a method of fabricating the semiconductor device.
2. Description of the Related Art
Analog metal-oxide-semiconductor transistors are composed of a gate formed on an oxide layer, and a source and a drain each being formed of upper and lower polysilicon electrodes and a capacitive element sandwiched therebetween. This capacitive element is required that a deviation from the specified capacitance value must be maintained in as small a range as possible under varying operating voltages. The lower polysilicon electrode and the gate are usually fabricated simultaneously. However, in the prior art transistor, the lower polysilicon electrode has no sufficient level of impurity dose to provide desired bias dependability. Thus there is a need to improve the bias dependability of a semiconductor device.
It is therefore an object of the present invention to provide a semiconductor device with a lower polysilicon electrode having an impurity dose that is sufficient to obtain desired bias dependability and a method of fabricating the semiconductor device.
According to one aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate, an insulating layer on the substrate, the insulating layer having a gate insulating region, a lower polysilicon electrode on the insulating layer, a capacitive insulating layer on the lower polysilicon electrode, an upper polysilicon electrode on the capacitive insulating layer, and a polysilicon gate electrode on the gate insulating region, the gate electrode being of equal thickness to the lower polysilicon electrode. The lower polysilicon electrode is doped with an impurity of conductivity type identical to conductivity type of the polysilicon gate electrode.
According to a further aspect, the present invention provides a method of fabricating a semiconductor device, comprising the steps of a (a) forming a first insulating layer with a gate insulating region on a semiconductor substrate, (b) forming a first polysilicon layer on the first insulating layer and the gate insulating region, the first polysilicon layer having a first portion spaced from a second portion which contacts the gate insulating region, (c) doping an impurity into the first portion of the first polysilicon layer, the impurity having a conductivity type equal to conductivity type of the first polysilicon, (d) forming a second insulating layer on the first polysilicon layer, (e) forming a second polysilicon layer on the second insulating layer, (f) performing a first selective etching process so that a capacitive insulating layer and an upper polysilicon electrode are successively formed on the first portion of the first polysilicon layer and the second portion of the first polysilicon layer is exposed, and (g) performing a second selective etching process so that the first and second portions of the first polysilicon layer define a lower polysilicon electrode and a gate electrode, respectively.